Taking a Risk on RISC

Acorn’s ARM has a leg up on other RISC processors

With all eyes focused on Intel’s 386SL as the CPU of choice for pen-based computers, there’s growing interest in alternate architectures, particularly RISC processors. What’s RISC’s big attraction? For the most part, raw speed. RISC processors are blazingly fast, at least when compared to traditional CISC (“complex instruction set computers”) CPUs. In benchmarks reported by BYTE Magazine, for instance, RISC-based machines run 31 percent more Dhrystones (a standard benchmark) per second than 80386-based PCs. Likewise, standard IBM benchmarks that measure the relative Dhrystone path length show the RS/6000 RISC processor outperforming the 80386 1.00 to 1.17. (It’s interesting to note that CISC processors like the Intel 80486 and Motorola 68040 incorporate RISC architectural features.)

The Compatibility Question

One of the biggest objections to alternative architectures like RISC is that they aren’t compatible with industry CISC standards set by Intel and Motorola. However, at least part of the promise of pen-based computing is a clean break with the past. Compatibility — particularly on the hardware side — doesn’t mean as much as it does with desktop machines. What’s really important is data compatibility independent of hardware architectures. Nevertheless, the argument can be made that processor-compatibility for applications can’t be discounted. Porting software from one processor to another often requires major rewrites of code, not just recompilation. This puts a heavy load on software developers. (One alternative, which extracts a performance penalty, is to provide 80×86 or 680×0 emulation on the RISC processor.)

The Contenders

Just about every major microprocessor vendor has RISC offerings, from Intel’s 860/960 line to AMD’s Am29000 and Motorola’s 88110. Perhaps the most prominent RISC contenders are the SPARC and MIPS processors, both of which have supporters who may introduce notebook systems (Toshiba has some SPARC projects in the works and Compaq is a likely notepad vendor and a major member of the ACE consortium which supports the MIPS architecture.)

But from what we’ve seen, the two RISC processors that will likely garner a lion’s share of attention for pen-based systems are the ARM processor from Olivetti-subsidiary Acorn Computer Group Plc in the United Kingdom and the RS/6000, the IBM-developed processor that’s a key component of the recent Apple/IBM liaison. (ARM is an acronym for “Acorn RISC Machine” while RS/6000 is short for “RISC System/6000”.)

Enter The ARM

So far, the only announced (although undelivered) stylus system using the ARM design is the Active Book from Active Book Company Ltd (ABC), also in the UK. This comes as no big surprise since Hermann Hauser, ABC’s founder, was co-founder of Acorn. According to published reports, ABC last year signed an agreement with Acorn to gain access to the Acorn RISC design as a standard cell. This simply means that ABC will use super-integration techniques to build the ARM architecture into a custom designed, multifunction chip. Hauser has stated that this chip array will provide a video controller, memory management, and direct memory access with the RISC processor.

The current implementation of the ARM is the ARM3, a processor that’s compatible with its ARM2 predecessor, but provides higher performance with a 4Kbyte on-chip cache. The ARM3 runs at 12 MHz, providing performance reportedly as high as 30 MIPS. The ARM/600, an even more powerful version of the processor, is rumored to be out later this year.

Acorn has been active in pushing its RISC processor. Late last year, the company sold intellectual property rights to Advanced RISC Machines Ltd., a company owned jointly by Apple Computer and VLSI Technology, to develop Acorn’s RISC technology. Additionally, Acorn has experienced strong sales for its ARM-based UNIX workstation.

When it comes to portable, pen-based computers, ARM technology has a leg up over competitors — it’s currently the only RISC chip designed for low-power consumption. This alone makes it a leading candidate for any mobile system that requires the power of RISC.

Running With the RS/6000

The RS/6000 is a second-generation RISC chip in that it employs advanced features like multiple instruction dispatch, simultaneous execution of fixed- and floating-point instructions, and separate instruction and data caches. Consequently, the RS/6000 can operate at a sustainable peak performance of from 40 to 60 MFLOPS. Between its logic and memory circuits, the processor has nearly 7 million transistors. It’s interesting that a key design goal was to produce more cost-effective chips; therefore the RS/6000 uses two data caches (not four) and requires only one memory card (not two).

Operating System Support Coming for RISC

Both Apple and IBM are committed to portable, pen-based development and are heavily involved in RISC. On the desktop, the recent Apple/IBM agreement could spell trouble for Apple’s adoption of the ARM. (Roger Heinen, Apple vice president of Macintosh software, has said that Apple will produce a version of the Mac OS for the RS/6000, perhaps as early as next year.) However, as Michael Slater noted in his Microprocessor Report, the first casualty of the IBM/Apple agreement may be Motorola’s soon-to-be-released 88110 RISC processor (another RISC chip Apple has seriously courted). Slater recently told us that he believes Apple is still committed to the ARM as the RISC solution for its future handheld or notebook offerings because of its low-power and high-speed features.

The RS/6000, which may be on its way to becoming the de facto industry standard RISC processor, is currently supported by IBM’s AIX Version 3, an implementation of UNIX that incorporates optimizations for the RISC chips. And IBM has demonstrated a UNIX-based handwriting recognition system running under the X Window System at both this year’s X Window Technical Conference and the recent Pen Computing conference.

Is Go Going with ARM?

More interestingly, we’ve learned that, among other features, GO’s PenPoint version 2.0 (rumored to be due out in the first half of 1992) will support RISC processors. Although GO officials won’t specify which RISC processor PenPoint will be ported to, other officers in the company have lauded the ARM as a powerful processor. We also know that members of the ABC development team have attended GO developer courses. One conclusion we draw from this is that PenPoint may be ported to the ARM, encouraging hardware designers to more closely consider the Acorn alternative. At the same time, we can’t discount the Apple/IBM coupling and the role of the RS/6000. Both Apple and IBM have more than a passing interest in RISC, both companies have acknowledged the bright future of pen-based computing, and IBM has licensed PenPoint.

Finally, there’s nothing to prevent operating environments like CIC’s recently announced PenDOS, a pen-aware environment for non-pencentric operating systems, from eventually being extended to support the Mac OS and UNIX (in fact, we’ve heard rumors that CIC has already completed its “PenUNIX” project) and running on RISC-based systems.

Do Pen-based Systems Need the Power of RISC?

A desktop pen-based market will evolve — signature verification in banks, for instance — that will be unfettered by the size and power restrictions inherent in portable systems. (By some estimates, this niche will be 15 to 20 percent of the total 1993 pen-based market.) These networked systems may very well benefit from RISC processors running under some version of UNIX. Likewise, mobile pen-based computers running multitasking applications with cursive recognition and similar sophisticated tasks may very well benefit from the high performance of RISC if problems like power consumption can be addressed. The answer to the question of which RISC processor will find a pen-based home should be answered within the coming year.